Parameters |
Max Propagation Delay @ V, Max CL |
27ns @ 6V, 50pF |
Trigger Type |
Negative Edge |
Input Capacitance |
3.5pF |
fmax-Min |
60 MHz |
Clock Edge Trigger Type |
Negative Edge |
Length |
8.65mm |
Width |
3.9mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2013 |
Series |
74HC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
JK Type |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HC107 |
Function |
Reset |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Clock Frequency |
85MHz |
Propagation Delay |
16 ns |
Quiescent Current |
4μA |
Turn On Delay Time |
15 ns |
Family |
HC/UH |
Logic Function |
Flip-Flop, JK-Type |
Current - Output High, Low |
5.2mA 5.2mA |
Number of Bits per Element |
1 |
74HC107D,653 Overview
As a result, it is packaged as 14-SOIC (0.154, 3.90mm Width). You can find it in the Tape & Reel (TR)package. It is configured with Differentialas an output. JK flip flop uses Negative Edgeas the trigger. This electronic part is mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. -40°C~125°C TAis the operating temperature. It belongs to the type JK Typeof flip flops. In FPGA terms, D flip flop is a type of 74HCseries FPGA. You should not exceed 85MHzin the output frequency of the device. Currently, there are 14 terminations. The 74HC107 family contains this object. An input voltage of 5Vpowers the D latch. Its input capacitance is 3.5pFfarads. HC/UHis the family of this D flip flop. It is mounted by the way of Surface Mount. As you can see from the design, it has pins with 14. This device has Negative Edgeas its clock edge trigger type. 6Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be kept above 2V. Using 2 circuits, it is highly flexible. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. In terms of quiescent current, it consumes 4μA .
74HC107D,653 Features
Tape & Reel (TR) package
74HC series
14 pins
74HC107D,653 Applications
There are a lot of Nexperia USA Inc. 74HC107D,653 Flip Flops applications.
- Digital electronics systems
- Computers
- Safety Clamp
- Patented noise
- Frequency Divider circuits
- Dynamic threshold performance
- Consumer
- Balanced 24 mA output drivers
- QML qualified product
- ESD performance