74HC112DB,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1998 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 4.5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 71MHz |
| Propagation Delay | 17 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 16 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3.5pF |
| Clock Edge Trigger Type | Negative Edge |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HC112DB,112 Overview
The package is in the form of 16-SSOP (0.209, 5.30mm Width). It is included in the package Tube. The output it is configured with uses Differential. This trigger uses the value Negative Edge. There is an electrical part that is mounted in the way of Surface Mount. With a supply voltage of 2V~6V volts, it operates. Currently, the operating temperature is -40°C~125°C TA. The type of this D latch is JK Type. This type of FPGA is a part of the 74HC series. It should not exceed 71MHzin its output frequency. Terminations are 16. The 74HC112family includes it. A voltage of 4.5V is used to power it. A 3.5pFfarad input capacitance is provided by this T flip flop. Electronic devices of this type belong to the HC/UHfamily. There is an electronic part mounted in the way of Surface Mount. This board is designed with 16pins on it. A Negative Edgeclock edge trigger is used in this device. There is a 6Vmaximum supply voltage (Vsup). The supply voltage (Vsup) should be maintained above 2V for normal operation. To achieve this superior flexibility, 2 circuits are used. If high efficiency is to be achieved, the supply voltage should be maintained at 5V. Despite external influences, it consumes 4μAof quiescent current.
74HC112DB,112 Features
Tube package
74HC series
16 pins
74HC112DB,112 Applications
There are a lot of Nexperia USA Inc. 74HC112DB,112 Flip Flops applications.
- Buffer registers
- Clock pulse
- Bounce elimination switch
- Cold spare funcion
- Shift registers
- Patented noise
- Circuit Design
- Power down protection
- QML qualified product
- Convert a momentary switch to a toggle switch
