74HC173D,652
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1997 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC173 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Bits | 4 |
| Clock Frequency | 95MHz |
| Propagation Delay | 17 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 16 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 4 |
| fmax-Min | 60 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.45mm |
| Length | 10mm |
| Width | 4mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74HC173D,652 Overview
The flip flop is packaged in 16-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tube package. It is configured with Tri-State, Non-Invertedas an output. It is configured with a trigger that uses Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 2V~6V. In the operating environment, the temperature is -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. In FPGA terms, D flip flop is a type of 74HCseries FPGA. It should not exceed 95MHzin terms of its output frequency. D latch consists of 1 elements. There is 4μA quiescent consumption. A total of 16terminations have been recorded. D latch belongs to the 74HC173 family. The D flip flop is powered by a voltage of 5V . This T flip flop has a capacitance of 3.5pF farads at the input. In terms of electronic devices, this device belongs to the HC/UHfamily of devices. The electronic part is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 16. This device has the clock edge trigger type of Positive Edge. There are 4bits in this flip flop. Vsup reaches 6V, the maximal supply voltage. Normal operation requires a supply voltage (Vsup) above 2V. For high efficiency, the supply voltage should be kept at 5V. It has 4lines. As a result, it consumes 8μA of quiescent current without being affected by external factors. In addition, WITH HOLD MODEis a characteristic of it.
74HC173D,652 Features
Tube package
74HC series
16 pins
4 Bits
74HC173D,652 Applications
There are a lot of Nexperia USA Inc. 74HC173D,652 Flip Flops applications.
- Test & Measurement
- Registers
- Balanced Propagation Delays
- Storage Registers
- Buffered Clock
- Buffer registers
- ESD performance
- Latch
- Control circuits
- Single Down Count-Control Line
