74HC173DB,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1997 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC173 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Bits | 4 |
| Clock Frequency | 95MHz |
| Propagation Delay | 17 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 16 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 4 |
| fmax-Min | 60 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2mm |
| Length | 6.2mm |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HC173DB,112 Overview
It is packaged in the way of 16-SSOP (0.209, 5.30mm Width). A package named Tubeincludes it. Currently, the output is configured to use Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. With a supply voltage of 2V~6V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74HC series. There should be no greater frequency than 95MHzon its output. In total, it contains 1 elements. Despite external influences, it consumes 4μAof quiescent current. Currently, there are 16 terminations. You can search similar parts based on 74HC173. It is powered by a voltage of 5V . The input capacitance of this JK flip flopis 3.5pF farads. It belongs to the family of electronic devices known as HC/UH. It is mounted by the way of Surface Mount. The 16pins are designed into the board. The clock edge trigger type for this device is Positive Edge. The flip flop is designed with 4bits. 6Vis the maximum supply voltage (Vsup). The supply voltage (Vsup) should be kept above 2V for normal operation. High efficiency requires the supply voltage to be maintained at 5V. The number of input lines is 4. Despite external influences, it consumes 8μAof quiescent current. Additionally, you may refer to the additional WITH HOLD MODE of the electronic flip flop.
74HC173DB,112 Features
Tube package
74HC series
16 pins
4 Bits
74HC173DB,112 Applications
There are a lot of Nexperia USA Inc. 74HC173DB,112 Flip Flops applications.
- Bounce elimination switch
- Functionally equivalent to the MC10/100EL29
- Latch
- Circuit Design
- Buffered Clock
- Balanced Propagation Delays
- Matched Rise and Fall
- Count Modes
- ESCC
- High Performance Logic for test systems
