74HC173PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1997 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC173 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Bits | 4 |
| Clock Frequency | 95MHz |
| Propagation Delay | 17 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 16 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 4 |
| fmax-Min | 60 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74HC173PW,112 Overview
It is embeded in 16-TSSOP (0.173, 4.40mm Width) case. Package Tubeembeds it. This output is configured with Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. It operates with a supply voltage of 2V~6V. Temperature is set to -40°C~125°C TA. This D latch has the type D-Type. It belongs to the 74HCseries of FPGAs. A frequency of 95MHzshould not be exceeded by its output. The element count is 1 . As a result, it consumes 4μA of quiescent current without being affected by external factors. Currently, there are 16 terminations. Members of the 74HC173family make up this object. Power is supplied from a voltage of 5V volts. Input capacitance of this device is 3.5pF farads. In this case, the D flip flop belongs to the HC/UHfamily. It is mounted by the way of Surface Mount. There are 16pins on it. This device has the clock edge trigger type of Positive Edge. Flip flops designed with 4bits are used in this part. Vsup reaches its maximum value at 6V. For normal operation, the supply voltage (Vsup) should be above 2V. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. This input has 4lines. As a result, it consumes 8μA of quiescent current without being affected by external factors. There is also a characteristic of WITH HOLD MODE.
74HC173PW,112 Features
Tube package
74HC series
16 pins
4 Bits
74HC173PW,112 Applications
There are a lot of Nexperia USA Inc. 74HC173PW,112 Flip Flops applications.
- Parallel data storage
- Differential Individual
- Dynamic threshold performance
- Data transfer
- Functionally equivalent to the MC10/100EL29
- Patented noise
- ESD protection
- Event Detectors
- Clock pulse
- Data storage
