74HC173PW,118
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 1997 |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC173 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Bits | 4 |
| Clock Frequency | 95MHz |
| Propagation Delay | 17 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 16 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 30ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 4 |
| fmax-Min | 60 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 5mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74HC173PW,118 Overview
The package is in the form of 16-TSSOP (0.173, 4.40mm Width). The package Tape & Reel (TR)contains it. It is configured with Tri-State, Non-Invertedas an output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. A voltage of 2V~6Vis used as the supply voltage. It is operating at a temperature of -40°C~125°C TA. This D latch has the type D-Type. The 74HCseries comprises this type of FPGA. You should not exceed 95MHzin the output frequency of the device. The list contains 1 elements. There is 4μA quiescent consumption. It has been determined that there have been 16 terminations. The 74HC173 family contains it. It is powered by a voltage of 5V . This T flip flop has a capacitance of 3.5pF farads at the input. Devices in the HC/UHfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. There are 16pins on it. In this device, the clock edge trigger type is Positive Edge. There are 4bits in this flip flop. Vsup reaches its maximum value at 6V. Normally, the supply voltage (Vsup) should be above 2V. In order to ensure high efficiency, the supply voltage should remain at 5V. Currently, there are 4 lines of input. As a result, it consumes 8μA of quiescent current without being affected by external factors. Additionally, you may refer to the D latch's additional WITH HOLD MODE.
74HC173PW,118 Features
Tape & Reel (TR) package
74HC series
16 pins
4 Bits
74HC173PW,118 Applications
There are a lot of Nexperia USA Inc. 74HC173PW,118 Flip Flops applications.
- Registers
- ESD protection
- Parallel data storage
- Guaranteed simultaneous switching noise level
- Divide a clock signal by 2 or 4
- Single Down Count-Control Line
- EMI reduction circuitry
- Balanced 24 mA output drivers
- Memory
- Frequency division
