Parameters |
Clock Frequency |
83MHz |
Propagation Delay |
13 ns |
Quiescent Current |
8μA |
Turn On Delay Time |
13 ns |
Family |
HC/UH |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
5.2mA 5.2mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
27ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Number of Input Lines |
8 |
fmax-Min |
60 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
24000000Hz |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Series |
74HC |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Additional Feature |
WITH HOLD MODE |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HC377 |
Function |
Standard |
Output Type |
Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Bits |
8 |
74HC377DB,112 Overview
The flip flop is packaged in a case of 20-SSOP (0.209, 5.30mm Width). A package named Tubeincludes it. It is configured with Non-Invertedas an output. It is configured with a trigger that uses Positive Edge. The electronic part is mounted in the way of Surface Mount. A 2V~6Vsupply voltage is required for it to operate. Currently, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. In FPGA terms, D flip flop is a type of 74HCseries FPGA. It should not exceed 83MHzin terms of its output frequency. A total of 1elements are contained within it. Terminations are 20. You can search similar parts based on 74HC377. An input voltage of 5Vpowers the D latch. A JK flip flop with a 3.5pFfarad input capacitance is used here. A device of this type belongs to the family of HC/UH. Electronic part Surface Mountis mounted in the way. This board has 20 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. An electronic part designed with 8bits is used in this application. In this case, the maximum supply voltage (Vsup) reaches 6V. Normally, the supply voltage (Vsup) should be kept above 2V. It runs on 2/6Vvolts of power. In order to achieve high efficiency, the supply voltage should be maintained at 5V. This input has 8lines. It consumes 8μA current. In addition, you can refer to the additinal WITH HOLD MODE of the D latch.
74HC377DB,112 Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
74HC377DB,112 Applications
There are a lot of Nexperia USA Inc. 74HC377DB,112 Flip Flops applications.
- Data storage
- Balanced Propagation Delays
- Frequency Dividers
- Shift Registers
- Reduced system switching noise
- Synchronous counter
- Event Detectors
- Guaranteed simultaneous switching noise level
- Single Up Count-Control Line
- Consumer