74HC377PW,118
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74HC377 |
| Function | Standard |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Bits | 8 |
| Clock Frequency | 83MHz |
| Propagation Delay | 13 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 13 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max Propagation Delay @ V, Max CL | 27ns @ 6V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 8 |
| fmax-Min | 24 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 6.5mm |
| Width | 4.4mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74HC377PW,118 Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). D flip flop is included in the Tape & Reel (TR)package. Non-Invertedis the output configured for it. There is a trigger configured with Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~6V volts. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74HCseries FPGA. In order for it to function properly, its output frequency should not exceed 83MHz. The element count is 1 . Terminations are 20. You can search similar parts based on 74HC377. A voltage of 5V provides power to the D latch. This JK flip flop has a 3.5pFfarad input capacitance. It is a member of the HC/UHfamily of D flip flop. There is an electronic component mounted in the way of Surface Mount. The 20pins are designed into the board. The clock edge trigger type for this device is Positive Edge. It is designed with a number of bits of 8. As soon as Vsup reaches 6V, the maximum supply voltage is reached. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. For high efficiency, the supply voltage should be kept at 5V. Currently, there are 8 lines of input. It consumes 8μA of quiescent current without being affected by external factors. Additionally, there are WITH HOLD MODE on the electronic flip flop that can be referred to.
74HC377PW,118 Features
Tape & Reel (TR) package
74HC series
20 pins
8 Bits
74HC377PW,118 Applications
There are a lot of Nexperia USA Inc. 74HC377PW,118 Flip Flops applications.
- Registers
- Buffer registers
- ESD protection
- Clock pulse
- Synchronous counter
- 2 – Bit synchronous counter
- Instrumentation
- Storage Registers
- Shift registers
- Control circuits
