74HC73DB,112
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | MASTER SLAVE OPERATION |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC73 |
| Function | Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 83MHz |
| Propagation Delay | 16 ns |
| Turn On Delay Time | 15 ns |
| Family | HC/UH |
| Logic Function | Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 27ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3.5pF |
| Clock Edge Trigger Type | Negative Edge |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HC73DB,112 Overview
The flip flop is packaged in 14-SSOP (0.209, 5.30mm Width). The Tubepackage contains it. T flip flop is configured with an output of Differential. It is configured with a trigger that uses a value of Negative Edge. This electronic part is mounted in the way of Surface Mount. Powered by a 2V~6Vvolt supply, it operates as follows. Temperature is set to -40°C~125°C TA. This D latch has the type JK Type. JK flip flop is a part of the 74HCseries of FPGAs. There should be no greater frequency than 83MHzon its output. During its operation, it consumes 4μA quiescent energy. 14terminations have occurred. D latch belongs to the 74HC73 family. A voltage of 5V is used as the power supply for this D latch. A 3.5pFfarad input capacitance is provided by this T flip flop. It belongs to the family of electronic devices known as HC/UH. Electronic part Surface Mountis mounted in the way. The electronic flip flop is designed with pins 14. This device has Negative Edgeas its clock edge trigger type. In this case, the maximum supply voltage (Vsup) reaches 6V. Normally, the supply voltage (Vsup) should be kept above 2V. To achieve this superior flexibility, 2 circuits are used. For high efficiency, the supply voltage should be set to 5V. There is also a characteristic of MASTER SLAVE OPERATION.
74HC73DB,112 Features
Tube package
74HC series
14 pins
74HC73DB,112 Applications
There are a lot of Nexperia USA Inc. 74HC73DB,112 Flip Flops applications.
- Synchronous counter
- Buffered Clock
- Registers
- Common Clocks
- Test & Measurement
- Set-reset capability
- Balanced 24 mA output drivers
- Cold spare funcion
- Consumer
- Digital electronics systems
