74HC73N,652
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 14-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | MASTER SLAVE OPERATION |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC73 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Clock Frequency | 83MHz |
| Family | HC/UH |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 5.2mA 5.2mA |
| Output Polarity | COMPLEMENTARY |
| Max I(ol) | 0.004 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 27ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74HC73N,652 Overview
14-DIP (0.300, 7.62mm)is the way it is packaged. D flip flop is embedded in the Tube package. It is configured with Differentialas an output. It is configured with a trigger that uses Negative Edge. Through Holeis occupied by this electronic component. Powered by a 2V~6Vvolt supply, it operates as follows. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type JK Typeof flip flops. JK flip flop belongs to the 74HCseries of FPGAs. This D flip flop should not have a frequency greater than 83MHz. In total, there are 2 elements. This process consumes 4μA quiescents. There have been 14 terminations. It is a member of the 74HC73 family. It is powered by a voltage of 5V . The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It belongs to the family of electronic devices known as HC/UH. It is part of the FF/Latchesbase part number family. It reaches 6Vwhen the supply voltage is maximal (Vsup). The supply voltage (Vsup) should be maintained above 2V for normal operation. It is also characterized by MASTER SLAVE OPERATION.
74HC73N,652 Features
Tube package
74HC series
74HC73N,652 Applications
There are a lot of NXP USA Inc. 74HC73N,652 Flip Flops applications.
- Storage Registers
- Bounce elimination switch
- Bus hold
- Counters
- High Performance Logic for test systems
- Test & Measurement
- Storage registers
- Guaranteed simultaneous switching noise level
- EMI reduction circuitry
- ATE
