74HCT109PW,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Weight | 113.398093g |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1997 |
| Series | 74HCT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HCT109 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 4mA |
| Clock Frequency | 55MHz |
| Propagation Delay | 17 ns |
| Turn On Delay Time | 13 ns |
| Family | HCT |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 35ns @ 4.5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 6.35mm |
| Length | 6.35mm |
| Width | 6.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HCT109PW,112 Overview
The package is in the form of 16-TSSOP (0.173, 4.40mm Width). It is contained within the Tubepackage. It is configured with Differentialas an output. The trigger configured with it uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis required for its operation. In this case, the operating temperature is -40°C~125°C TA. This electronic flip flop is of type JK Type. In FPGA terms, D flip flop is a type of 74HCTseries FPGA. A frequency of 55MHzshould be the maximum output frequency. As a result, it consumes 4μA of quiescent current without being affected by external factors. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 74HCT109family make up this object. A voltage of 5V is used to power it. This JK flip flop has a 3.5pFfarad input capacitance. This D flip flop belongs to the family of HCT. Surface Mount mounts this electronic component. There are 16pins on it. The clock edge trigger type for this device is Positive Edge. The superior flexibility of this circuit is achieved by using 2 circuits. A high level of efficiency can be achieved by maintaining the supply voltage at 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 4mA.
74HCT109PW,112 Features
Tube package
74HCT series
16 pins
74HCT109PW,112 Applications
There are a lot of Nexperia USA Inc. 74HCT109PW,112 Flip Flops applications.
- Modulo – n – counter
- ESCC
- Frequency Divider circuits
- Event Detectors
- Balanced Propagation Delays
- Reduced system switching noise
- Synchronous counter
- Shift registers
- Control circuits
- Shift Registers
