74HCT112D,652
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 4.535924g |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Published | 1998 |
| Series | 74HCT |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HCT112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 4mA |
| Clock Frequency | 64MHz |
| Propagation Delay | 19 ns |
| Turn On Delay Time | 21 ns |
| Family | HCT |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 4mA 4mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 35ns @ 4.5V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3.5pF |
| Number of Input Lines | 8 |
| Number of Output Lines | 4 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 6.35mm |
| Length | 12.7mm |
| Width | 6.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74HCT112D,652 Overview
16-SOIC (0.154, 3.90mm Width)is the packaging method. A package named Tubeincludes it. As configured, the output uses Differential. This trigger uses the value Negative Edge. There is an electronic component mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. -40°C~125°C TAis the operating temperature. JK Typeis the type of this D latch. It belongs to the 74HCTseries of FPGAs. This D flip flop should not have a frequency greater than 64MHz. T flip flop consumes 4μA quiescent energy. There are 16 terminations,JK flip flop belongs to 74HCT112 family. It is powered by a voltage of 5V . The input capacitance of this JK flip flopis 3.5pF farads. It belongs to the family of electronic devices known as HCT. There is an electronic component mounted in the way of Surface Mount. A total of 16pins are provided on this board. There is a clock edge trigger type of Negative Edgeon this device. Despite its superior flexibility, it relies on 2 circuits to achieve it. For high efficiency, the supply voltage should be set to 5V. The 4mA output current allows it to be designed with the greatest amount of flexibility. There are 4 output lines in this JK flip flop. As of now, there are 8input lines.
74HCT112D,652 Features
Tube package
74HCT series
16 pins
74HCT112D,652 Applications
There are a lot of Nexperia USA Inc. 74HCT112D,652 Flip Flops applications.
- Single Up Count-Control Line
- Shift registers
- Dynamic threshold performance
- Balanced 24 mA output drivers
- Cold spare funcion
- Bounce elimination switch
- Event Detectors
- Convert a momentary switch to a toggle switch
- Pattern generators
- Common Clocks
