Parameters |
Mounting Type |
Through Hole |
Package / Case |
16-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Published |
1997 |
Series |
74HCT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
D-Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
Additional Feature |
WITH HOLD MODE |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74HCT173 |
Function |
Master Reset |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Load Capacitance |
50pF |
Clock Frequency |
80MHz |
Family |
HCT |
Current - Quiescent (Iq) |
4μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
6mA 6mA |
Output Polarity |
TRUE |
Max I(ol) |
0.006 A |
Number of Bits per Element |
4 |
Max Propagation Delay @ V, Max CL |
40ns @ 4.5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
60 ns |
fmax-Min |
60 MHz |
Width |
7.62mm |
RoHS Status |
ROHS3 Compliant |
74HCT173N,652 Overview
It is embeded in 16-DIP (0.300, 7.62mm) case. There is an embedded version in the package Tube. The output it is configured with uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. In this case, the electronic component is mounted in the way of Through Hole. With a supply voltage of 4.5V~5.5V volts, it operates. It is operating at -40°C~125°C TA. D-Typeis the type of this D latch. It is a type of FPGA belonging to the 74HCT series. This D flip flop should not have a frequency greater than 80MHz. A total of 1elements are contained within it. As a result, it consumes 4μA quiescent current. There are 16 terminations,The 74HCT173 family contains this object. The power supply voltage is 5V. A JK flip flop with a 3.5pFfarad input capacitance is used here. It is a member of the HCTfamily of D flip flop. It is included in FF/Latches. It reaches the maximum supply voltage (Vsup) at 5.5V. A power supply of 5Vis required to operate it. Additionally, there are WITH HOLD MODE on the electronic flip flop that can be referred to.
74HCT173N,652 Features
Tube package
74HCT series
5V power supplies
74HCT173N,652 Applications
There are a lot of NXP USA Inc. 74HCT173N,652 Flip Flops applications.
- Latch-up performance
- Frequency Divider circuits
- ESCC
- Balanced Propagation Delays
- Computers
- Registers
- High Performance Logic for test systems
- Digital electronics systems
- Frequency Dividers
- Safety Clamp