74LCX112M
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 143mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2001 |
| Series | 74LCX |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 2.5V |
| Base Part Number | 74LCX112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Clock Frequency | 150MHz |
| Propagation Delay | 9 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 7.5ns @ 3.3V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 7pF |
| Number of Input Lines | 5 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.499mm |
| Length | 10mm |
| Width | 3.988mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LCX112M Overview
The item is packaged in 16-SOIC (0.154, 3.90mm Width)cases. Package Tubeembeds it. Currently, the output is configured to use Differential. This trigger is configured to use Negative Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~3.6V. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type JK Type. JK flip flop belongs to the 74LCXseries of FPGAs. A frequency of 150MHzshould not be exceeded by its output. Terminations are 16. If you search by 74LCX112, you will find similar parts. A voltage of 2.5V is used to power it. Its input capacitance is 7pFfarads. Electronic devices of this type belong to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. It is designed with 16 pins. This device's clock edge trigger type is Negative Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. Vsup reaches 3.6V, the maximal supply voltage. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. Its superior flexibility is attributed to its use of 2 circuits. As a result of its reliable performance, this T flip flop is suitable for RAIL. There are 3.3V power supplies attached to it. Currently, there are 5 input lines present. 10μAquiescent current consumed.
74LCX112M Features
Tube package
74LCX series
16 pins
3.3V power supplies
74LCX112M Applications
There are a lot of ON Semiconductor 74LCX112M Flip Flops applications.
- Reduced system switching noise
- Balanced 24 mA output drivers
- Communications
- Storage Registers
- Latch-up performance
- Frequency Dividers
- ESD protection
- Common Clocks
- Convert a momentary switch to a toggle switch
- Power down protection
