74LCX112MTC
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Weight | 173mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2001 |
| Series | 74LCX |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 2.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LCX112 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Clock Frequency | 150MHz |
| Propagation Delay | 8 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 7 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 7.5ns @ 3.3V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 7pF |
| Number of Input Lines | 5 |
| Clock Edge Trigger Type | Negative Edge |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LCX112MTC Overview
16-TSSOP (0.173, 4.40mm Width)is the way it is packaged. A package named Tubeincludes it. This output is configured with Differential. This trigger is configured to use Negative Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 2V~3.6Vis required for its operation. It is operating at a temperature of -40°C~85°C TA. It is an electronic flip flop with the type JK Type. JK flip flop is a part of the 74LCXseries of FPGAs. It should not exceed 150MHzin its output frequency. In total, there are 2 elements. The number of terminations is 16. The 74LCX112 family contains this object. A voltage of 2.5V is used to power it. JK flip flop input capacitance is 7pF farads. This D flip flop belongs to the family of LVC/LCX/Z. The electronic part is mounted in the way of Surface Mount. The 16pins are designed into the board. Its clock edge trigger type is Negative Edge. There is a base part number FF/Latchesfor the RS flip flops. In this case, the maximum supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 2V for normal operation. Compared to other similar T flip flops, this device offers reliable performance and is well suited for RAIL. It operates from 3.3V power supplies. Currently, there are 5 input lines present. Despite external influences, it consumes 10μAof quiescent current.
74LCX112MTC Features
Tube package
74LCX series
16 pins
3.3V power supplies
74LCX112MTC Applications
There are a lot of ON Semiconductor 74LCX112MTC Flip Flops applications.
- Frequency division
- Communications
- Instrumentation
- Power down protection
- Count Modes
- Safety Clamp
- Divide a clock signal by 2 or 4
- Dynamic threshold performance
- Matched Rise and Fall
- Memory
