74LCX374MTR
| Parameters | |
|---|---|
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LCX |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LCX374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Clock Frequency | 140MHz |
| Propagation Delay | 9.5 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Trigger Type | Positive Edge |
| Input Capacitance | 6pF |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
74LCX374MTR Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. D flip flop is included in the Cut Tape (CT)package. Currently, the output is configured to use Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. With a supply voltage of 2V~3.6V volts, it operates. In this case, the operating temperature is -55°C~125°C TA. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74LCXseries FPGA. You should not exceed 140MHzin its output frequency. D latch consists of 1 elements. There have been 20 terminations. Members of the 74LCX374family make up this object. Power is supplied from a voltage of 2.7V volts. A JK flip flop with a 6pFfarad input capacitance is used here. Devices in the LVC/LCX/Zfamily are electronic devices. This electronic part is mounted in the way of Surface Mount. It is designed with 20 pins. In this device, the clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. There are 8bits in its design. The supply voltage (Vsup) should be kept above 2V for normal operation. Using 8 circuits, it is highly flexible. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. The D flip flop is embedded with 2ports. In order for the chip to function, it has 3output lines. As a result, it consumes 10μA of quiescent current without being affected by external factors.
74LCX374MTR Features
Cut Tape (CT) package
74LCX series
20 pins
8 Bits
74LCX374MTR Applications
There are a lot of STMicroelectronics 74LCX374MTR Flip Flops applications.
- Frequency division
- Cold spare funcion
- Matched Rise and Fall
- ESD performance
- Latch-up performance
- Test & Measurement
- High Performance Logic for test systems
- Communications
- Safety Clamp
- Buffer registers
