74LCX574FT
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LCX |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1.65V~3.6V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 150MHz |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 7pF |
| RoHS Status | RoHS Compliant |
74LCX574FT Overview
The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). A package named Tape & Reel (TR)includes it. Currently, the output is configured to use Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. It is a type of FPGA belonging to the 74LCX series. In order for it to function properly, its output frequency should not exceed 150MHz. A total of 1elements are present in it. It consumes 10μA of quiescent Input capacitance of this device is 7pF farads.
74LCX574FT Features
Tape & Reel (TR) package
74LCX series
74LCX574FT Applications
There are a lot of Toshiba Semiconductor and Storage 74LCX574FT Flip Flops applications.
- Reduced system switching noise
- Load Control
- Asynchronous counter
- Bus hold
- Memory
- Single Up Count-Control Line
- Frequency division
- Synchronous counter
- Supports Live Insertion
- Buffered Clock
