74LV00N,112
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 14-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~125°C |
| Packaging | Tube |
| Published | 2011 |
| Series | 74LV |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | Gates |
| Technology | CMOS |
| Voltage - Supply | 1V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 4 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LV00 |
| Pin Count | 14 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 1V |
| Number of Circuits | 4 |
| Load Capacitance | 50pF |
| Family | LV/LV-A/LVX/H |
| Number of Inputs | 2 |
| Current - Output High, Low | 12mA 12mA |
| Logic Type | NAND Gate |
| Max I(ol) | 0.006 A |
| Max Propagation Delay @ V, Max CL | 6.5ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 18 ns |
| Propagation Delay (tpd) | 31 ns |
| Schmitt Trigger | NO |
| Logic Level - Low | 0.3V ~ 0.8V |
| Logic Level - High | 0.9V ~ 2V |
| Current - Quiescent (Max) | 40μA |
| RoHS Status | ROHS3 Compliant |
74LV00N,112 Overview
Packed in 14-DIP (0.300, 7.62mm), the part is convenient for shipping overseas. This packaging method provides high reliability because it uses advanced packaging techniques. A NAND Gate logic principle governs its operation. To ensure the part's full function, a voltage of 1V~5.5V is needed. Temperatures around -40°C~125°C are extended for operation. The part is mounted in Through Hole. 12mA 12mA output current is 12mA 12mA in the high or low state. The series 74LV contains it. A total of 14 terminations have been recorded. It has 4 functions that enhance user experience significantly. There is a chip in this package that is a part of LV/LV-A/LVX/H. Use 74LV00 to search for device variants. The part body is injected with 14 pins. It supports inputs of 2. The logic device shown here is a typical Gates. Circuits number 4 make up this device. 50pF is the load capacitance of the part. To supply the device, a voltage of 1V must be applied. As soon as Vsup reaches 5.5V, the maximal supply voltage is achieved. Power supplies required for this part are specified in the datasheet as 3.3V. As long as the standby mode is on, 40μA current is drawn.
74LV00N,112 Features
NAND Gate Logic Type
Operating Temperature: -40°C~125°C
LV/LV-A/LVX/H Family
74LV00N,112 Applications
There are a lot of NXP USA Inc. 74LV00N,112 Gates and Inverters applications.
- Photovoltaic system
- Projector
- Electricity for military and civilian life in areas without electricity
- Digital camera
- Electric shaver
- Air conditioner
- Fan
- Car
- Troubleshooting & Judgment
- Cell phone
