74LV273DB,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SSOP (0.209, 5.30mm Width) |
| Supplier Device Package | 20-SSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1V~5.5V |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 100MHz |
| Current - Quiescent (Iq) | 160μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 19ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74LV273DB,118 Overview
20-SSOP (0.209, 5.30mm Width)is the packaging method. D flip flop is embedded in the Tape & Reel (TR) package. Currently, the output is configured to use Non-Inverted. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. A 1V~5.5Vsupply voltage is required for it to operate. The operating temperature is -40°C~125°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74LVseries FPGA. It should not exceed 100MHzin its output frequency. D latch consists of 1 elements. It consumes 160μA of quiescent current without being affected by external factors. Its input capacitance is 3.5pF farads.
74LV273DB,118 Features
Tape & Reel (TR) package
74LV series
74LV273DB,118 Applications
There are a lot of Rochester Electronics, LLC 74LV273DB,118 Flip Flops applications.
- Control circuits
- Event Detectors
- Differential Individual
- Consumer
- Synchronous counter
- Divide a clock signal by 2 or 4
- Bus hold
- Safety Clamp
- Common Clocks
- Matched Rise and Fall
