Parameters |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~125°C |
Packaging |
Tube |
Published |
1998 |
Series |
74LV |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
TYPICAL VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
1V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Number of Functions |
1 |
Supply Voltage |
3.3V |
Terminal Pitch |
2.54mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LV373 |
Pin Count |
20 |
JESD-30 Code |
R-PDIP-T20 |
Qualification Status |
Not Qualified |
Output Type |
Tri-State |
Circuit |
8:8 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
1V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Family |
LV/LV-A/LVX/H |
Output Characteristics |
3-STATE |
Current - Output High, Low |
16mA 16mA |
Logic Type |
D-Type Transparent Latch |
Output Polarity |
TRUE |
Max I(ol) |
0.008 A |
Prop. Delay@Nom-Sup |
28 ns |
Independent Circuits |
1 |
Delay Time - Propagation |
20ns |
Height Seated (Max) |
4.2mm |
Length |
26.73mm |
Width |
7.62mm |
RoHS Status |
ROHS3 Compliant |
74LV373N,112 Overview
A package called 20-DIP (0.300, 7.62mm) contains it. This package has the format of Tube. Tri-State is used for the output it is configured with. This electrical device has Logic type D-Type Transparent Latch. Electronic components are mounted using the Through Hole method. There is no supply voltage for this device. A temperature of -40°C~125°C is used for operation. The 74LV series contains FPGAs of this type. The electronic part in this image has 8 bits. This device has been designed with 20 terminations available. This type belongs to the 74LV373 family. In order to operate it, the supply voltage must be 3.3V. The device is equipped with 20 pins. This electronic device is categorized as a LV/LV-A/LVX/H electronic device. In this device, there are 2 ports. This part can be found within the FF/Latches subcategory. There is a maximum voltage supply (Vsup) that reaches 5.5V. The system is powered by 3.3V sources. It is recommended that the supply voltage (Vsup) be greater than 1V. In addition to that, it is also characterized by TYPICAL VOLP < 0.8V AT VCC = 3.3V, TA = 25 DEGREE C.
74LV373N,112 Features
20-DIP (0.300, 7.62mm) package
74LV series
8 Bits
74LV373 family
20 pin count
3.3V power supplies
74LV373N,112 Applications
There are a lot of NXP USA Inc. 74LV373N,112 Latches applications.
- Phase comparator
- Hammer
- Shift right register
- Meter applications
- Registers
- Parallel Input
- Shift left with parallel loading
- Shift right with parallel loading
- Counter
- Storage