74LV373PW,112
| Parameters | |
|---|---|
| JESD-30 Code | R-PDSO-G20 |
| Qualification Status | Not Qualified |
| Output Type | Tri-State |
| Circuit | 8:8 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 1V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Family | LV/LV-A/LVX/H |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Logic Type | D-Type Transparent Latch |
| Output Polarity | TRUE |
| Max I(ol) | 0.008 A |
| Prop. Delay@Nom-Sup | 28 ns |
| Independent Circuits | 1 |
| Delay Time - Propagation | 20ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C |
| Packaging | Tube |
| Published | 1998 |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LV373 |
| Pin Count | 20 |
74LV373PW,112 Overview
The 20-TSSOP (0.173, 4.40mm Width) package contains it. Tube is the way it is packaged. Tri-State is used for the output it is configured with. There is a logic type of D-Type Transparent Latch associated with this electrical device. The electronic component is mounted according to the Surface Mount method. With a supply voltage of 1V~5.5V, it operates. There is -40°C~125°C operating temperature. 74LV is the series number of this FPGA. This electronic part is designed with 8 Bits. In this device, there are 20 terminations. The family in which it belongs to is 74LV373. In order to operate it, the supply voltage must be 3.3V. With 20 pins, it is equipped. There is a device in this electronic family called LV/LV-A/LVX/H. 2 ports are available on this device. This part is included in FF/Latches. 5.5V is the maximum supply voltage (Vsup). It operates from 3.3V power supplies. It is recommended to have a higher supply voltage (Vsup) than 1V.
74LV373PW,112 Features
20-TSSOP (0.173, 4.40mm Width) package
74LV series
8 Bits
74LV373 family
20 pin count
3.3V power supplies
74LV373PW,112 Applications
There are a lot of NXP USA Inc. 74LV373PW,112 Latches applications.
- Sample and hold register
- Network Switches
- Communication systems
- Avionics
- TV Set-top Boxes
- Display driver
- Relay replacement
- Counting
- Stacked or Push-Down Registers
- Programmable binary
