74LV373PW,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C |
| Packaging | Tape & Reel (TR) |
| Published | 1998 |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LV373 |
| JESD-30 Code | R-PDSO-G20 |
| Qualification Status | Not Qualified |
| Output Type | Tri-State |
| Circuit | 8:8 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 1V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 8 |
| Family | LV/LV-A/LVX/H |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Logic Type | D-Type Transparent Latch |
| Output Polarity | TRUE |
| Max I(ol) | 0.008 A |
| Prop. Delay@Nom-Sup | 28 ns |
| Independent Circuits | 1 |
| Delay Time - Propagation | 20ns |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LV373PW,118 Overview
The package in which it is embedded is named 20-TSSOP (0.173, 4.40mm Width). As a result, it has a packaging of Tape & Reel (TR). It is configured with an output of Tri-State. This electrical device has Logic type D-Type Transparent Latch. A Surface Mount mount is used for mounting this electronic part. There is no supply voltage for this device. It is -40°C~125°C at the operating temperature. This FPGA is part of the 74LV series. It is designed with 8 bits. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The family 74LV373 includes it. The device works with a voltage of 3.3V for its supply voltage. It is a member of the LV/LV-A/LVX/H family of electronic devices. In this device, there is a total of 2 ports available for use. FF/Latches is the subcategory of this part. 5.5V is the maximum voltage (Vsup) that can be supplied. The device is powered by 3.3V power supplies. A voltage greater than 1V must be supplied as a power supply (Vsup).
74LV373PW,118 Features
20-TSSOP (0.173, 4.40mm Width) package
74LV series
8 Bits
74LV373 family
3.3V power supplies
74LV373PW,118 Applications
There are a lot of NXP USA Inc. 74LV373PW,118 Latches applications.
- Pattern generators
- Counter
- Bus system register with enable parallel lines at bus side
- Sample and hold register
- Registers
- Storage
- Address register
- Multi-line decoders
- Shift right with parallel loading
- Audio and video switching
