74LV374D,112
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Supplier Device Package | 20-SO |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1V~5.5V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 77MHz |
| Current - Quiescent (Iq) | 160μA |
| Current - Output High, Low | 16mA 16mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 19ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74LV374D,112 Overview
The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. A package named Tubeincludes it. There is a Tri-State, Non-Invertedoutput configured with it. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 1V~5.5Vis used as the supply voltage. It is operating at a temperature of -40°C~125°C TA. The type of this D latch is D-Type. This type of FPGA is a part of the 74LV series. There should be no greater frequency than 77MHzon its output. A total of 1 elements are present. As a result, it consumes 160μA quiescent current and is not affected by external forces. This JK flip flop has a 3.5pFfarad input capacitance.
74LV374D,112 Features
Tube package
74LV series
74LV374D,112 Applications
There are a lot of Rochester Electronics, LLC 74LV374D,112 Flip Flops applications.
- Shift registers
- Dynamic threshold performance
- Bounce elimination switch
- Safety Clamp
- EMI reduction circuitry
- Guaranteed simultaneous switching noise level
- Memory
- Buffered Clock
- Power down protection
- Synchronous counter
