74LV374D,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Supplier Device Package | 20-SO |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1V~5.5V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 77MHz |
| Current - Quiescent (Iq) | 160μA |
| Current - Output High, Low | 16mA 16mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 19ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74LV374D,118 Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Tri-State, Non-Invertedas the output. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1V~5.5V. It is operating at a temperature of -40°C~125°C TA. It belongs to the type D-Typeof flip flops. In FPGA terms, D flip flop is a type of 74LVseries FPGA. A frequency of 77MHzshould not be exceeded by its output. D latch consists of 1 elements. As a result, it consumes 160μA quiescent current. The input capacitance of this JK flip flopis 3.5pF farads.
74LV374D,118 Features
Tape & Reel (TR) package
74LV series
74LV374D,118 Applications
There are a lot of Rochester Electronics, LLC 74LV374D,118 Flip Flops applications.
- Memory
- Balanced 24 mA output drivers
- Data transfer
- Guaranteed simultaneous switching noise level
- Bounce elimination switch
- ESD performance
- Single Up Count-Control Line
- Parallel data storage
- Synchronous counter
- Event Detectors
