Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2009 |
Series |
74LV |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LV374 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
1V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Clock Frequency |
77MHz |
Family |
LV/LV-A/LVX/H |
Current - Quiescent (Iq) |
160μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
16mA 16mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
19ns @ 5V, 50pF |
Prop. Delay@Nom-Sup |
29 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
49 ns |
Max Frequency@Nom-Sup |
20000000Hz |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74LV374D,118 Overview
In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. The Tape & Reel (TR)package contains it. T flip flop is configured with an output of Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. Surface Mountis positioned in the way of this electronic part. A supply voltage of 1V~5.5V is required for operation. The operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. This type of FPGA is a part of the 74LV series. Its output frequency should not exceed 77MHz Hz. A total of 1elements are contained within it. It consumes 160μA of quiescent The number of terminations is 20. The object belongs to the 74LV374 family. The power supply voltage is 3.3V. A 3.5pFfarad input capacitance is provided by this T flip flop. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. This RS flip flops is a part number FF/Latches. As soon as 5.5Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be maintained above 1V for normal operation. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. The power supply is 3.3V. This flip flop has a total of 2ports.
74LV374D,118 Features
Tape & Reel (TR) package
74LV series
3.3V power supplies
74LV374D,118 Applications
There are a lot of NXP USA Inc. 74LV374D,118 Flip Flops applications.
- ESCC
- Latch-up performance
- Test & Measurement
- Balanced Propagation Delays
- Frequency division
- Divide a clock signal by 2 or 4
- Circuit Design
- Memory
- Differential Individual
- Functionally equivalent to the MC10/100EL29