74LV374PW,118
| Parameters | |
|---|---|
| Current - Quiescent (Iq) | 160μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 19ns @ 5V, 50pF |
| Prop. Delay@Nom-Sup | 29 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Propagation Delay (tpd) | 36 ns |
| Max Frequency@Nom-Sup | 20000000Hz |
| Length | 6.5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2009 |
| Series | 74LV |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LV374 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 1V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Clock Frequency | 77MHz |
| Family | LV/LV-A/LVX/H |
74LV374PW,118 Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. Package Tape & Reel (TR)embeds it. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1V~5.5V. Temperature is set to -40°C~125°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74LV series. It should not exceed 77MHzin terms of its output frequency. A total of 1elements are contained within it. There is 160μA quiescent consumption. A total of 20 terminations have been made. You can search similar parts based on 74LV374. The D flip flop is powered by a voltage of 3.3V . A 3.5pFfarad input capacitance is provided by this T flip flop. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. It is part of the FF/Latchesbase part number family. Vsup reaches its maximum value at 3.6V. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 1V. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. The system runs on a power supply of 3.3V watts. The D flip flop is embedded with 2ports.
74LV374PW,118 Features
Tape & Reel (TR) package
74LV series
3.3V power supplies
74LV374PW,118 Applications
There are a lot of NXP USA Inc. 74LV374PW,118 Flip Flops applications.
- Guaranteed simultaneous switching noise level
- High Performance Logic for test systems
- ATE
- Buffered Clock
- Individual Asynchronous Resets
- Divide a clock signal by 2 or 4
- Circuit Design
- Balanced 24 mA output drivers
- CMOS Process
- Frequency Dividers
