Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Supplier Device Package |
20-SSOP |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Series |
74LV |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
1V~3.6V |
Function |
Standard |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Clock Frequency |
70MHz |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
6mA 6mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
30ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
RoHS Status |
ROHS3 Compliant |
74LV377DB,112 Overview
In the form of 20-SSOP (0.209, 5.30mm Width), it has been packaged. D flip flop is included in the Tubepackage. There is a Non-Invertedoutput configured with it. Positive Edgeis the trigger it is configured with. Surface Mountis occupied by this electronic component. With a supply voltage of 1V~3.6V volts, it operates. -40°C~125°C TAis the operating temperature. This D latch has the type D-Type. It is a type of FPGA belonging to the 74LV series. It should not exceed 70MHzin its output frequency. A total of 1elements are contained within it. It consumes 20μA of quiescent This JK flip flop has a 3.5pFfarad input capacitance.
74LV377DB,112 Features
Tube package
74LV series
74LV377DB,112 Applications
There are a lot of Rochester Electronics, LLC 74LV377DB,112 Flip Flops applications.
- Buffered Clock
- Pattern generators
- Count Modes
- Storage registers
- Set-reset capability
- Bus hold
- Shift registers
- Control circuits
- Individual Asynchronous Resets
- Test & Measurement