74LV377DB,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-SSOP (0.209, 5.30mm Width) |
| Supplier Device Package | 20-SSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1V~3.6V |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 70MHz |
| Current - Quiescent (Iq) | 160μA |
| Current - Output High, Low | 6mA 6mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 30ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74LV377DB,118 Overview
The flip flop is packaged in 20-SSOP (0.209, 5.30mm Width). The Tape & Reel (TR)package contains it. The output it is configured with uses Non-Inverted. It is configured with the trigger Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1V~3.6V. It is operating at -40°C~125°C TA. D-Typedescribes this flip flop. It belongs to the 74LVseries of FPGAs. It should not exceed 70MHzin terms of its output frequency. A total of 1 elements are present. T flip flop consumes 160μA quiescent energy. This JK flip flop has a 3.5pFfarad input capacitance.
74LV377DB,118 Features
Tape & Reel (TR) package
74LV series
74LV377DB,118 Applications
There are a lot of Rochester Electronics, LLC 74LV377DB,118 Flip Flops applications.
- ESD protection
- Divide a clock signal by 2 or 4
- Power down protection
- Event Detectors
- Bus hold
- Common Clocks
- Load Control
- Shift registers
- QML qualified product
- Buffered Clock
