Parameters |
Delay Time - Propagation |
24ns |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
RoHS Status |
ROHS3 Compliant |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~125°C |
Packaging |
Tape & Reel (TR) |
Published |
2009 |
Series |
74LV |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
BROADSIDE VERSION OF 373 |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Number of Functions |
1 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LV573 |
Pin Count |
20 |
JESD-30 Code |
R-PDSO-G20 |
Qualification Status |
Not Qualified |
Output Type |
Tri-State |
Circuit |
8:8 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
1V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Family |
LV/LV-A/LVX/H |
Output Characteristics |
3-STATE |
Current - Output High, Low |
16mA 16mA |
Logic Type |
D-Type Transparent Latch |
Output Polarity |
TRUE |
Max I(ol) |
0.008 A |
Prop. Delay@Nom-Sup |
29 ns |
Independent Circuits |
1 |
74LV573DB,118 Overview
20-SSOP (0.209, 5.30mm Width) contains it. A package of Tape & Reel (TR) has been used. It uses Tri-State as its output configuration. There is a logic type of D-Type Transparent Latch associated with this electrical device. This electronic part is mounted in the way of Surface Mount. In order for it to operate, it needs a supply voltage of 1V~5.5V. A temperature of -40°C~125°C is set as the operating temperature. An FPGA in this series belongs to the 74LV family. The design of this electronic part is based on 8 bits. In this device, there are 20 terminations. 74LV573 is its family. It operates with a supply voltage of 3.3V. There are 20 pins attached to it. It is part of the family of electronic devices called LV/LV-A/LVX/H. This device has 2 ports that can be connected to it. It belongs to the subcategory of FF/Latches. When Vsup reaches 5.5V, the maximal supply voltage is reached. 3.3V power supplies are needed to operate it. A supply voltage (Vsup) greater than 1V is required. Based on its reliable performance, this device is suitable for TAPE AND REEL. There is also BROADSIDE VERSION OF 373 characteristics to it.
74LV573DB,118 Features
20-SSOP (0.209, 5.30mm Width) package
74LV series
8 Bits
74LV573 family
20 pin count
3.3V power supplies
74LV573DB,118 Applications
There are a lot of NXP USA Inc. 74LV573DB,118 Latches applications.
- Parallel Input
- Serial Output Data Queuing
- Shift right with parallel loading
- Automatic test equipment
- Buffer/Storage Registers
- Automotive HEV/EV Powertrain
- Parallel Input
- Meter applications
- Four-bit storage with output enable
- Parallel Output