Parameters |
Mounting Type |
Through Hole |
Package / Case |
20-DIP (0.300, 7.62mm) |
Surface Mount |
NO |
Operating Temperature |
-40°C~125°C |
Packaging |
Tube |
Published |
2009 |
Series |
74LV |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
BROADSIDE VERSION OF 373 |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
1V~5.5V |
Terminal Position |
DUAL |
Peak Reflow Temperature (Cel) |
260 |
Number of Functions |
1 |
Supply Voltage |
3.3V |
Terminal Pitch |
2.54mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LV573 |
Pin Count |
20 |
JESD-30 Code |
R-PDIP-T20 |
Qualification Status |
Not Qualified |
Output Type |
Tri-State |
Circuit |
8:8 |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
1V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Family |
LV/LV-A/LVX/H |
Output Characteristics |
3-STATE |
Current - Output High, Low |
16mA 16mA |
Logic Type |
D-Type Transparent Latch |
Output Polarity |
TRUE |
Max I(ol) |
0.008 A |
Prop. Delay@Nom-Sup |
29 ns |
Independent Circuits |
1 |
Delay Time - Propagation |
24ns |
Height Seated (Max) |
4.2mm |
Length |
26.73mm |
Width |
7.62mm |
RoHS Status |
ROHS3 Compliant |
74LV573N,112 Overview
A package called 20-DIP (0.300, 7.62mm) contains it. Tube is the way in which it is packaged. It is configured with an output of Tri-State. A D-Type Transparent Latch logic type is used in this electrical device. According to Through Hole, this electronic part is mounted. With a supply voltage of 1V~5.5V, it operates. During operation, the temperature is set at -40°C~125°C. The 74LV series of FPGAs is the one this FPGA belongs to. The electronic part in this image has 8 bits. This device has been designed with 20 terminations available. 74LV573 is its family. It operates with a supply voltage of 3.3V. The device is equipped with 20 pins. This electronic device is categorized as a LV/LV-A/LVX/H electronic device. 2 ports are available on this device. There is a subcategory of FF/Latches for this part. 5.5V is the maximum supply voltage (Vsup). A total of 3.3V power supplies are required for it to operate. In order to operate properly, the supply voltage (Vsup) should be greater than 1V. There are also characteristics of BROADSIDE VERSION OF 373 associated with it.
74LV573N,112 Features
20-DIP (0.300, 7.62mm) package
74LV series
8 Bits
74LV573 family
20 pin count
3.3V power supplies
74LV573N,112 Applications
There are a lot of NXP USA Inc. 74LV573N,112 Latches applications.
- Flip-flops
- Automotive Body Electronics
- Control circuits
- Counters
- Bus system register with enable parallel lines at bus side
- Lamp and Display (LED)
- Serial Output Data Queuing
- Stacked or Push-Down Registers
- Hammer Device Information
- Avionics