74LV574PW,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1V~5.5V |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 70MHz |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 16mA 16mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 17ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| RoHS Status | ROHS3 Compliant |
74LV574PW,118 Overview
As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). D flip flop is included in the Tape & Reel (TR)package. In the configuration, Tri-State, Non-Invertedis used as the output. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 1V~5.5V. Currently, the operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop belongs to the 74LVseries of FPGAs. This D flip flop should not have a frequency greater than 70MHz. A total of 1elements are present in it. T flip flop consumes 20μA quiescent energy. JK flip flop input capacitance is 3.5pF farads.
74LV574PW,118 Features
Tape & Reel (TR) package
74LV series
74LV574PW,118 Applications
There are a lot of Rochester Electronics, LLC 74LV574PW,118 Flip Flops applications.
- Single Down Count-Control Line
- CMOS Process
- Count Modes
- Common Clocks
- Cold spare funcion
- Reduced system switching noise
- Data storage
- Matched Rise and Fall
- 2 – Bit synchronous counter
- Synchronous counter
