Parameters |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Supplier Device Package |
20-TSSOP |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2009 |
Series |
74LV |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Max Operating Temperature |
125°C |
Min Operating Temperature |
-40°C |
Voltage - Supply |
1V~5.5V |
Frequency |
70MHz |
Base Part Number |
74LV574 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
3.3V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Number of Circuits |
1 |
Max Supply Voltage |
5.5V |
Min Supply Voltage |
1V |
Output Current |
35mA |
Number of Bits |
8 |
Clock Frequency |
70MHz |
Propagation Delay |
13 ns |
Quiescent Current |
160μA |
Turn On Delay Time |
21 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
20μA |
Current - Output High, Low |
16mA 16mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
17ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
High Level Output Current |
-16mA |
Input Capacitance |
3.5pF |
Low Level Output Current |
16mA |
Number of Input Lines |
8 |
Number of Output Lines |
8 |
Clock Edge Trigger Type |
Positive Edge |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
74LV574PW,118 Overview
20-TSSOP (0.173, 4.40mm Width)is the way it is packaged. The Tape & Reel (TR)package contains it. It is configured with Tri-State, Non-Invertedas an output. This trigger is configured to use Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates with an input voltage of 1V~5.5V volts. A temperature of -40°C~125°C TAis considered to be the operating temperature. D-Typeis the type of this D latch. This type of FPGA is a part of the 74LV series. A frequency of 70MHzshould be the maximum output frequency. In total, there are 1 elements. As a result, it consumes 20μA of quiescent current without being affected by external factors. If you search by 74LV574, you will find similar parts. A JK flip flop with a 3.5pFfarad input capacitance is used here. It is mounted by the way of Surface Mount. The 20pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. The flip flop is designed with 8bits. To achieve this superior flexibility, 1 circuits are used. High efficiency requires the supply voltage to be maintained at 3.3V. Featuring the maximum design flexibility, it has an output current of 35mA . In order for the chip to function, it has 8output lines. There are 8 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply. It consumes a total of 160μA quiescent current at any given time. A -16mAis set for the high level output current. The low level output current is set to 16mA. Ideally, the operating temperature should be lower than 125°C. A temperature above -40°Cshould be used for the operation. Initially, it requires a voltage of 1V as the minimum supply voltage. It is capable of supporting a maximum supply voltage of 5.5V. It is possible to achieve 70MHz frequencies.
74LV574PW,118 Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
74LV574PW,118 Applications
There are a lot of Nexperia USA Inc. 74LV574PW,118 Flip Flops applications.
- Parallel data storage
- Shift registers
- Frequency division
- ESCC
- Digital electronics systems
- Computing
- Consumer
- Registers
- ATE
- Cold spare funcion