74LVC109PW,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 16-TSSOP (0.173, 4.40mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2002 |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC109 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Load Capacitance | 50pF |
| Clock Frequency | 330MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.8ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 7.5 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Propagation Delay (tpd) | 8.5 ns |
| Length | 5mm |
| Width | 4.4mm |
| RoHS Status | ROHS3 Compliant |
74LVC109PW,118 Overview
The flip flop is packaged in 16-TSSOP (0.173, 4.40mm Width). You can find it in the Tape & Reel (TR)package. In the configuration, Differentialis used as the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis in the way of this electric part. With a supply voltage of 1.65V~3.6V volts, it operates. A temperature of -40°C~125°C TAis considered to be the operating temperature. There is JK Type type of electronic flip flop associated with this device. The 74LVCseries comprises this type of FPGA. You should not exceed 330MHzin the output frequency of the device. A total of 2elements are present in it. As a result, it consumes 10μA of quiescent current without being affected by external factors. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. You can search similar parts based on 74LVC109. It is powered by a voltage of 3.3V . JK flip flop input capacitance is 5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. The part you are looking for is included in FF/Latches. Vsup reaches 3.6V, the maximal supply voltage. The system runs on a power supply of 3.3V watts.
74LVC109PW,118 Features
Tape & Reel (TR) package
74LVC series
3.3V power supplies
74LVC109PW,118 Applications
There are a lot of NXP USA Inc. 74LVC109PW,118 Flip Flops applications.
- Counters
- Modulo – n – counter
- Bus hold
- ESD performance
- Safety Clamp
- Latch-up performance
- Shift registers
- Pattern generators
- Memory
- Dynamic threshold performance
