74LVC1G175DCKTG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-TSSOP, SC-88, SOT-363 |
| Number of Pins | 6 |
| Weight | 2.494758mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74LVC1G175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 1 |
| Load Capacitance | 50pF |
| Output Current | 32mA |
| Number of Bits | 1 |
| Clock Frequency | 175MHz |
| Propagation Delay | 5.7 ns |
| Quiescent Current | 10μA |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.032 A |
| Max Propagation Delay @ V, Max CL | 4ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVC1G175DCKTG4 Overview
The item is packaged in 6-TSSOP, SC-88, SOT-363cases. As part of the package Tape & Reel (TR), it is embedded. This output is configured with Non-Inverted. Positive Edgeis the trigger it is configured with. Surface Mountmounts this electrical part. The JK flip flop operates at a voltage of 1.65V~5.5V. It is operating at a temperature of -40°C~125°C TA. This D latch has the type D-Type. It belongs to the 74LVCseries of FPGAs. It should not exceed 175MHzin terms of its output frequency. 6terminations have occurred. This D latch belongs to the family of 74LVC1G175. The D flip flop is powered by a voltage of 1.8V . The input capacitance of this JK flip flopis 3pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. It is mounted by the way of Surface Mount. It is designed with 6 pins. This device's clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The design is based on 1bits. As soon as 5.5Vis reached, Vsup reaches its maximum value. The superior flexibility of this product is achieved by using 1 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. It runs on 3.3Vvolts of power. Its output current of 32mAallows for maximum design flexibility. There is a consumption of 10μAof quiescent current from it.
74LVC1G175DCKTG4 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
3.3V power supplies
74LVC1G175DCKTG4 Applications
There are a lot of Texas Instruments 74LVC1G175DCKTG4 Flip Flops applications.
- Frequency Divider circuits
- Latch-up performance
- Synchronous counter
- Safety Clamp
- Set-reset capability
- Shift registers
- Memory
- Asynchronous counter
- Cold spare funcion
- Buffer registers
