74LVC1G175GM,132
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2014 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74LVC1G175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 200MHz |
| Propagation Delay | 3.1 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 2.2 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC1G175GM,132 Overview
It is packaged in the way of 6-XFDFN. Package Tape & Reel (TR)embeds it. Non-Invertedis the output configured for it. It is configured with a trigger that uses Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. A temperature of -40°C~125°C TAis considered to be the operating temperature. There is D-Type type of electronic flip flop associated with this device. The 74LVCseries comprises this type of FPGA. In order for it to function properly, its output frequency should not exceed 200MHz. Despite external influences, it consumes 40μAof quiescent current. Currently, there are 6 terminations. Members of the 74LVC1G175family make up this object. A voltage of 2.7V is used to power it. This T flip flop has a capacitance of 2.5pF farads at the input. It belongs to the family of electronic devices known as LVC/LCX/Z. This electronic part is mounted in the way of Surface Mount. With its 6pins, it is designed to work with most electronic flip flops. This device has Positive Edgeas its clock edge trigger type. 1bits are used in its design. 5.5Vis the maximum supply voltage (Vsup). Its flexibility is enhanced by 1 circuits. This D latch consumes 100nA quiescent current at all.
74LVC1G175GM,132 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
74LVC1G175GM,132 Applications
There are a lot of Nexperia USA Inc. 74LVC1G175GM,132 Flip Flops applications.
- Parallel data storage
- Dynamic threshold performance
- Patented noise
- Divide a clock signal by 2 or 4
- Control circuits
- Common Clocks
- Event Detectors
- EMI reduction circuitry
- Storage Registers
- Asynchronous counter
