74LVC1G74DP-Q100H
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2013 |
| Series | 74LVC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC1G74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 200MHz |
| Propagation Delay | 13.4 ns |
| Quiescent Current | 100nA |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 3mm |
| Width | 3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVC1G74DP-Q100H Overview
In the form of 8-TSSOP, 8-MSOP (0.118, 3.00mm Width), it has been packaged. You can find it in the Tape & Reel (TR)package. There is a Differentialoutput configured with it. This trigger is configured to use Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 1.65V~5.5V. In this case, the operating temperature is -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74LVCseries contain this type of chip. In order for it to function properly, its output frequency should not exceed 200MHz. There are 1 elements in it. Despite external influences, it consumes 40μAof quiescent current. Terminations are 8. The 74LVC1G74family includes it. Power is supplied from a voltage of 1.8V volts. JK flip flop input capacitance is 4pF farads. In this case, the D flip flop belongs to the LVC/LCX/Zfamily. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. This device exhibits a clock edge trigger type of Positive Edge. 1bits are used in its design. As soon as 5.5Vis reached, Vsup reaches its maximum value. In terms of quiescent current, it consumes 100nA .
74LVC1G74DP-Q100H Features
Tape & Reel (TR) package
74LVC series
8 pins
1 Bits
74LVC1G74DP-Q100H Applications
There are a lot of Nexperia USA Inc. 74LVC1G74DP-Q100H Flip Flops applications.
- Count Modes
- QML qualified product
- EMI reduction circuitry
- Automotive
- Registers
- Communications
- Event Detectors
- Test & Measurement
- Frequency Dividers
- Set-reset capability
