74LVC1G79GM,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74LVC1G79 |
| Function | Standard |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 500MHz |
| Propagation Delay | 2.6 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.7 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 500μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Max Supply Voltage (DC) | 5.5V |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVC1G79GM,115 Overview
6-XFDFNis the way it is packaged. It is included in the package Tape & Reel (TR). The output it is configured with uses Non-Inverted. Positive Edgeis the trigger it is configured with. It is mounted in the way of Surface Mount. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. It is operating at a temperature of -40°C~125°C TA. It belongs to the type D-Typeof flip flops. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 500MHz Hz. As a result, it consumes 500μA quiescent current. It has been determined that there have been 6 terminations. This D latch belongs to the family of 74LVC1G79. It is powered by a voltage of 1.8V . JK flip flop input capacitance is 5pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. Surface Mount mounts this electronic component. The 6pins are designed into the board. A Positive Edgeclock edge trigger is used in this device. This flip flop is designed with 1 Bits. To achieve this superior flexibility, 1 circuits are used. It consumes 100nA of quiescent current without being affected by external factors.
74LVC1G79GM,115 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
74LVC1G79GM,115 Applications
There are a lot of Nexperia USA Inc. 74LVC1G79GM,115 Flip Flops applications.
- 2 – Bit synchronous counter
- Latch
- Guaranteed simultaneous switching noise level
- Convert a momentary switch to a toggle switch
- Circuit Design
- Data transfer
- Power down protection
- Matched Rise and Fall
- Patented noise
- Pattern generators
