74LVC1G79GW-Q100H
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | Automotive, AEC-Q100, 74LVC |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC1G79 |
| JESD-30 Code | R-PDSO-G5 |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 500MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 32mA 32mA |
| Output Polarity | TRUE |
| Max Propagation Delay @ V, Max CL | 3.8ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Length | 2.05mm |
| RoHS Status | ROHS3 Compliant |
74LVC1G79GW-Q100H Overview
It is embeded in 5-TSSOP, SC-70-5, SOT-353 case. D flip flop is embedded in the Tape & Reel (TR) package. T flip flop is configured with an output of Non-Inverted. This trigger uses the value Positive Edge. This electronic part is mounted in the way of Surface Mount. A 1.65V~5.5Vsupply voltage is required for it to operate. It is at -40°C~125°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. It belongs to the Automotive, AEC-Q100, 74LVCseries of FPGAs. This D flip flop should not have a frequency greater than 500MHz. The element count is 1 . This process consumes 4μA quiescents. A total of 5terminations have been recorded. If you search by 74LVC1G79, you will find similar parts. It is powered from a supply voltage of 1.8V. The input capacitance of this JK flip flopis 5pF farads. A device of this type belongs to the family of LVC/LCX/Z. It is designed with a number of bits of 1. 5.5Vis the maximum supply voltage (Vsup).
74LVC1G79GW-Q100H Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74LVC series
1 Bits
74LVC1G79GW-Q100H Applications
There are a lot of Nexperia USA Inc. 74LVC1G79GW-Q100H Flip Flops applications.
- Single Up Count-Control Line
- QML qualified product
- Single Down Count-Control Line
- Control circuits
- Computing
- Memory
- Pattern generators
- Bounce elimination switch
- Count Modes
- Power down protection
