74LVC1G80GN,132
| Parameters | |
|---|---|
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.3mm |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Output Type | Inverted |
| Number of Elements | 1 |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Propagation Delay | 13 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.8 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.35mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
74LVC1G80GN,132 Overview
The flip flop is packaged in 6-XFDFN. A package named Tape & Reel (TR)includes it. As configured, the output uses Inverted. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis required for its operation. In this case, the operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74LVC series. You should not exceed 400MHzin the output frequency of the device. The list contains 1 elements. As a result, it consumes 200μA quiescent current and is not affected by external forces. Terminations are 6. D latch belongs to the 74LVC1G80 family. The D flip flop is powered by a voltage of 3.3V . Its input capacitance is 5pF farads. LVC/LCX/Zis the family of this D flip flop. Surface Mount mounts this electronic component. It is designed with 6 pins. This device's clock edge trigger type is Positive Edge. An electronic part designed with 1bits is used in this application. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. It consumes a total of 100nA quiescent current at any given time.
74LVC1G80GN,132 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
74LVC1G80GN,132 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GN,132 Flip Flops applications.
- Load Control
- Balanced Propagation Delays
- Shift registers
- Control circuits
- Dynamic threshold performance
- Differential Individual
- Guaranteed simultaneous switching noise level
- High Performance Logic for test systems
- CMOS Process
- Consumer
