74LVC1G80GV,125
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | SC-74A, SOT-753 |
| Number of Pins | 5 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2013 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Output Type | Inverted |
| Polarity | Inverting |
| Number of Circuits | 1 |
| Output Current | 50mA |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Propagation Delay | 2.4 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.8 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Length | 2.9mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVC1G80GV,125 Overview
It is packaged in the way of SC-74A, SOT-753. D flip flop is embedded in the Tape & Reel (TR) package. T flip flop is configured with an output of Inverted. It is configured with the trigger Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. A temperature of -40°C~125°C TAis considered to be the operating temperature. It is an electronic flip flop with the type D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. A frequency of 400MHzshould not be exceeded by its output. It consumes 200μA of quiescent current without being affected by external factors. Terminations are 5. D latch belongs to the 74LVC1G80 family. Power is supplied from a voltage of 3.3V volts. This T flip flop has a capacitance of 5pF farads at the input. It belongs to the family of electronic devices known as LVC/LCX/Z. The electronic part is mounted in the way of Surface Mount. There are 5pins on it. There is a clock edge trigger type of Positive Edgeon this device. The flip flop is designed with 1bits. Its flexibility is enhanced by 1 circuits. The 50mA output current allows it to be designed with the greatest amount of flexibility. In terms of quiescent current, it consumes 100nA .
74LVC1G80GV,125 Features
Tape & Reel (TR) package
74LVC series
5 pins
1 Bits
74LVC1G80GV,125 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GV,125 Flip Flops applications.
- QML qualified product
- Load Control
- Frequency division
- Control circuits
- Synchronous counter
- Computers
- Functionally equivalent to the MC10/100EL29
- Parallel data storage
- Common Clocks
- Data storage
