Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2013 |
Series |
74LVC |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Supply Voltage |
3.3V |
Base Part Number |
74LVC273 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Clock Frequency |
230MHz |
Propagation Delay |
8.2 ns |
Quiescent Current |
10μA |
Family |
LVC/LCX/Z |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
8.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
74LVC273D-Q100J Overview
As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). D flip flop is included in the Tape & Reel (TR)package. T flip flop uses Non-Invertedas its output configuration. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. A 1.65V~3.6Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~125°C TA. It is an electronic flip flop with the type D-Type. It belongs to the 74LVCseries of FPGAs. There should be no greater frequency than 230MHzon its output. The element count is 1 . The number of terminations is 20. Members of the 74LVC273family make up this object. An input voltage of 3.3Vpowers the D latch. There is 5pF input capacitance for this T flip flop. It is a member of the LVC/LCX/Zfamily of D flip flop. There is an electronic part that is mounted in the way of Surface Mount. This device exhibits a clock edge trigger type of Positive Edge. It reaches the maximum supply voltage (Vsup) at 3.6V. It consumes 10μA of quiescent current without being affected by external factors.
74LVC273D-Q100J Features
Tape & Reel (TR) package
74LVC series
74LVC273D-Q100J Applications
There are a lot of Nexperia USA Inc. 74LVC273D-Q100J Flip Flops applications.
- 2 – Bit synchronous counter
- Latch
- ATE
- Modulo – n – counter
- Computers
- Functionally equivalent to the MC10/100EL29
- ESD performance
- Memory
- Balanced 24 mA output drivers
- Buffer registers