Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2013 |
Series |
74LVC |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Supply Voltage |
3.3V |
Terminal Pitch |
0.65mm |
Base Part Number |
74LVC273 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Clock Frequency |
230MHz |
Propagation Delay |
8.2 ns |
Quiescent Current |
10μA |
Family |
LVC/LCX/Z |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
8.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Clock Edge Trigger Type |
Positive Edge |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
74LVC273PW-Q100J Overview
The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). D flip flop is included in the Tape & Reel (TR)package. As configured, the output uses Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. It operates with a supply voltage of 1.65V~3.6V. In this case, the operating temperature is -40°C~125°C TA. It belongs to the type D-Typeof flip flops. FPGAs belonging to the 74LVCseries contain this type of chip. You should not exceed 230MHzin the output frequency of the device. D latch consists of 1 elements. A total of 20 terminations have been made. JK flip flop belongs to 74LVC273 family. An input voltage of 3.3Vpowers the D latch. This JK flip flop has a 5pFfarad input capacitance. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. The electronic part is mounted in the way of Surface Mount. It has a clock edge trigger type of Positive Edge. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). Despite external influences, it consumes 10μAof quiescent current.
74LVC273PW-Q100J Features
Tape & Reel (TR) package
74LVC series
74LVC273PW-Q100J Applications
There are a lot of Nexperia USA Inc. 74LVC273PW-Q100J Flip Flops applications.
- Patented noise
- Registers
- Cold spare funcion
- Storage registers
- Synchronous counter
- Counters
- Data storage
- Data Synchronizers
- Balanced 24 mA output drivers
- Functionally equivalent to the MC10/100EL29