74LVC2G74GN,115
| Parameters | |
|---|---|
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.3mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Number of Elements | 1 |
| Number of Bits | 1 |
| Clock Frequency | 200MHz |
| Turn On Delay Time | 2.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 32mA 32mA |
| Output Polarity | COMPLEMENTARY |
| Max Propagation Delay @ V, Max CL | 4.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| fmax-Min | 200 MHz |
| Max Supply Voltage (DC) | 5.5V |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.35mm |
| RoHS Status | ROHS3 Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFDFN |
| Number of Pins | 8 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
74LVC2G74GN,115 Overview
It is embeded in 8-XFDFN case. It is included in the package Tape & Reel (TR). This output is configured with Differential. This trigger is configured to use Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. Currently, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. The 74LVCseries comprises this type of FPGA. Its output frequency should not exceed 200MHz. There are 1 elements in it. As a result, it consumes 40μA quiescent current and is not affected by external forces. There have been 8 terminations. The 74LVC2G74 family contains this object. The D flip flop is powered by a voltage of 1.8V . Input capacitance of this device is 4pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. The electronic part is mounted in the way of Surface Mount. With its 8pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Positive Edge. 1bits are used in its design.
74LVC2G74GN,115 Features
Tape & Reel (TR) package
74LVC series
8 pins
1 Bits
74LVC2G74GN,115 Applications
There are a lot of Nexperia USA Inc. 74LVC2G74GN,115 Flip Flops applications.
- Frequency Dividers
- Communications
- Storage Registers
- Differential Individual
- Consumer
- Test & Measurement
- Bus hold
- Latch-up performance
- Cold spare funcion
- Circuit Design
