Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVC374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
3.3V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Circuits |
8 |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
150MHz |
Propagation Delay |
11 ns |
Quiescent Current |
100nA |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
10 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74LVC374AD,118 Overview
The package is in the form of 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Tape & Reel (TR). Currently, the output is configured to use Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. Surface Mountis in the way of this electric part. A supply voltage of 1.65V~3.6V is required for operation. A temperature of -40°C~125°C TAis considered to be the operating temperature. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74LVC series. This D flip flop should not have a frequency greater than 150MHz. A total of 1elements are contained within it. During its operation, it consumes 10μA quiescent energy. The number of terminations is 20. If you search by 74LVC374, you will find similar parts. A voltage of 2.7V provides power to the D latch. JK flip flop input capacitance is 4pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. It is mounted by the way of Surface Mount. As you can see from the design, it has pins with 20. This device's clock edge trigger type is Positive Edge. It is designed with a number of bits of 8. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. Despite its superior flexibility, it relies on 8 circuits to achieve it. The flip flop contains 2ports. It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency. Currently, there are 10 lines of input. There is 100nA quiescent current consumption by it.
74LVC374AD,118 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
74LVC374AD,118 Applications
There are a lot of Nexperia USA Inc. 74LVC374AD,118 Flip Flops applications.
- Storage Registers
- Frequency division
- Count Modes
- Clock pulse
- Event Detectors
- ESD protection
- Test & Measurement
- Divide a clock signal by 2 or 4
- Safety Clamp
- Common Clocks