Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Series |
74LVC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVC374 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
150MHz |
Propagation Delay |
2.7 ns |
Quiescent Current |
100nA |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
8 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2mm |
Length |
7.2mm |
Width |
5.3mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
74LVC374ADB,112 Overview
20-SSOP (0.209, 5.30mm Width)is the packaging method. D flip flop is embedded in the Tube package. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with the trigger Positive Edge. There is an electric part mounted in the way of Surface Mount. A 1.65V~3.6Vsupply voltage is required for it to operate. The operating temperature is -40°C~125°C TA. D-Typedescribes this flip flop. In this case, it is a type of FPGA belonging to the 74LVC series. In order for it to function properly, its output frequency should not exceed 150MHz. The element count is 1 . This process consumes 10μA quiescents. There have been 20 terminations. The 74LVC374family includes it. The power source is powered by 2.7V. Its input capacitance is 4pF farads. LVC/LCX/Zis the family of this D flip flop. This electronic part is mounted in the way of Surface Mount. 20pins are included in its design. It has a clock edge trigger type of Positive Edge. This flip flop is designed with 8 Bits. Vsup reaches 3.6V, the maximal supply voltage. The flip flop has 2embedded ports. It has 8lines. There is 100nA quiescent current consumption by it.
74LVC374ADB,112 Features
Tube package
74LVC series
20 pins
8 Bits
74LVC374ADB,112 Applications
There are a lot of Nexperia USA Inc. 74LVC374ADB,112 Flip Flops applications.
- Frequency division
- Balanced 24 mA output drivers
- CMOS Process
- Safety Clamp
- Frequency Divider circuits
- Bus hold
- Common Clocks
- Single Down Count-Control Line
- Parallel data storage
- Clock pulse