74LVC377DB,118
| Parameters | |
|---|---|
| Length | 7.2mm |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Additional Feature | WITH HOLD MODE |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC377 |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Bits | 8 |
| Clock Frequency | 330MHz |
| Propagation Delay | 6 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 7.6ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 8 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2mm |
74LVC377DB,118 Overview
The item is packaged in 20-SSOP (0.209, 5.30mm Width)cases. You can find it in the Tape & Reel (TR)package. In the configuration, Non-Invertedis used as the output. This trigger is configured to use Positive Edge. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. -40°C~125°C TAis the operating temperature. It belongs to the type D-Typeof flip flops. It belongs to the 74LVCseries of FPGAs. It should not exceed 330MHzin terms of its output frequency. In total, it contains 1 elements. This process consumes 10μA quiescents. Terminations are 20. The 74LVC377 family contains this object. Power is provided by a 2.7V supply. A 5pFfarad input capacitance is provided by this T flip flop. It is a member of the LVC/LCX/Zfamily of D flip flop. It is mounted by the way of Surface Mount. 20pins are included in its design. A Positive Edgeclock edge trigger is used in this device. It is designed with 8bits. Vsup reaches its maximum value at 3.6V. 8input lines are available for you to choose from. Quiescent current is consumed by the D latch in the amount of 100nA. In addition, WITH HOLD MODEis a characteristic of it.
74LVC377DB,118 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
74LVC377DB,118 Applications
There are a lot of Nexperia USA Inc. 74LVC377DB,118 Flip Flops applications.
- QML qualified product
- Registers
- Memory
- ESCC
- Load Control
- Matched Rise and Fall
- Frequency division
- Latch-up performance
- EMI reduction circuitry
- Functionally equivalent to the MC10/100EL29
