74LVC574AD,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) |
| Additional Feature | BROADSIDE VERSION OF 374 |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC574 |
| JESD-30 Code | R-PDSO-G20 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Ports | 2 |
| Clock Frequency | 200MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 7ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
74LVC574AD,112 Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. As part of the package Tube, it is embedded. This output is configured with Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~3.6Vvolts. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. FPGAs belonging to the 74LVCseries contain this type of chip. You should not exceed 200MHzin the output frequency of the device. A total of 1elements are contained within it. There is 10μA quiescent consumption. A total of 20 terminations have been made. The object belongs to the 74LVC574 family. Power is provided by a 2.7V supply. This JK flip flop has a 5pFfarad input capacitance. An electronic device belonging to the family LVC/LCX/Zcan be found here. It reaches the maximum supply voltage (Vsup) at 3.6V. The flip flop has 2ports embedded within it. In addition, you can refer to the additinal BROADSIDE VERSION OF 374 of the D latch.
74LVC574AD,112 Features
Tube package
74LVC series
74LVC574AD,112 Applications
There are a lot of Nexperia USA Inc. 74LVC574AD,112 Flip Flops applications.
- Differential Individual
- Individual Asynchronous Resets
- ESD performance
- Count Modes
- Matched Rise and Fall
- Parallel data storage
- Bus hold
- 2 – Bit synchronous counter
- Frequency Divider circuits
- Event Detectors
