74LVC74ABQ,115
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-VFQFN Exposed Pad |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.2V~3.6V |
| Terminal Position | QUAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.7V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Output Current | 50mA |
| Clock Frequency | 250MHz |
| Propagation Delay | 2.5 ns |
| Turn On Delay Time | 2.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 950μm |
| Length | 3.1mm |
| Width | 2.6mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74LVC74ABQ,115 Overview
As a result, it is packaged as 14-VFQFN Exposed Pad. It is included in the package Tape & Reel (TR). T flip flop uses Differentialas its output configuration. In the configuration of the trigger, Positive Edgeis used. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 1.2V~3.6V volts. In this case, the operating temperature is -40°C~125°C TA. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74LVCseries contain this type of chip. It should not exceed 250MHzin its output frequency. As a result, it consumes 10μA quiescent current and is not affected by external forces. It has been determined that there have been 14 terminations. Members of the 74LVC74family make up this object. The power supply voltage is 2.7V. Its input capacitance is 4pF farads. The electronic device belongs to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. There are 14pins on it. It has a clock edge trigger type of Positive Edge. In this case, the maximum supply voltage (Vsup) reaches 3.6V. Its flexibility is enhanced by 2 circuits. This T flip flop features a maximum design flexibility due to its output current of 50mA. There are 1 output lines in this JK flip flop.
74LVC74ABQ,115 Features
Tape & Reel (TR) package
74LVC series
14 pins
74LVC74ABQ,115 Applications
There are a lot of Nexperia USA Inc. 74LVC74ABQ,115 Flip Flops applications.
- Communications
- Common Clocks
- Count Modes
- Parallel data storage
- 2 – Bit synchronous counter
- Cold spare funcion
- Counters
- Functionally equivalent to the MC10/100EL29
- Bus hold
- Frequency division
