74LVC74ADB,112
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LVC74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Number of Circuits | 2 |
| Clock Frequency | 250MHz |
| Propagation Delay | 2.5 ns |
| Turn On Delay Time | 2.5 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC74ADB,112 Overview
It is embeded in 14-SSOP (0.209, 5.30mm Width) case. As part of the package Tube, it is embedded. T flip flop uses Differentialas the output. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 1.2V~3.6Vis required for its operation. Currently, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74LVC series. This D flip flop should not have a frequency greater than 250MHz. As a result, it consumes 10μA quiescent current. Currently, there are 14 terminations. This D latch belongs to the family of 74LVC74. The D flip flop is powered by a voltage of 1.8V . This T flip flop has a capacitance of 4pF farads at the input. Electronic devices of this type belong to the LVC/LCX/Zfamily. This electronic part is mounted in the way of Surface Mount. As you can see from the design, it has pins with 14. In this device, the clock edge trigger type is Positive Edge. 3.6Vis the maximum supply voltage (Vsup). The superior flexibility of this circuit is achieved by using 2 circuits. There are no output lines on the JK flip flop.
74LVC74ADB,112 Features
Tube package
74LVC series
14 pins
74LVC74ADB,112 Applications
There are a lot of Nexperia USA Inc. 74LVC74ADB,112 Flip Flops applications.
- Safety Clamp
- Computing
- Counters
- Instrumentation
- Pattern generators
- Patented noise
- Convert a momentary switch to a toggle switch
- Circuit Design
- EMI reduction circuitry
- Balanced 24 mA output drivers
