74LVC821ABQ,118
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 24-VFQFN Exposed Pad |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 1.65V~3.6V |
| Base Part Number | 74LVC821 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Clock Frequency | 200MHz |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 7.3ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| RoHS Status | ROHS3 Compliant |
74LVC821ABQ,118 Overview
The item is packaged in 24-VFQFN Exposed Padcases. Package Tape & Reel (TR)embeds it. It is configured with Tri-State, Non-Invertedas an output. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~125°C TA. The type of this D latch is D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. This D flip flop should not have a frequency greater than 200MHz. D latch consists of 1 elements. There is a consumption of 10μAof quiescent energy. The object belongs to the 74LVC821 family. Its input capacitance is 5pFfarads.
74LVC821ABQ,118 Features
Tape & Reel (TR) package
74LVC series
74LVC821ABQ,118 Applications
There are a lot of NXP USA Inc. 74LVC821ABQ,118 Flip Flops applications.
- Matched Rise and Fall
- Functionally equivalent to the MC10/100EL29
- Guaranteed simultaneous switching noise level
- Synchronous counter
- Set-reset capability
- Control circuits
- Modulo – n – counter
- Buffered Clock
- Patented noise
- Instrumentation
